Integrated Circuit Layout Designer Job Description Sample
Integrated Circuit Design Engineer - Ts/Sci With Poly
The Leidos Intelligence Group will be adding multiple Integrated Circuit Design Engineers to their Leidos-led prime contract in Linthicum Heights, MD (BWI area). These opportunities would be of great interest to an Electrical or Computer Engineer with FPGA design experience.
The successful engineer will support a Leidos led contract providing hardware design services to our customer.
Design digital logic for FPGAs with high-speed requirements.
Design interfaces that incorporate High Speed Serdes (HSS)
Perform design, VHDL coding, simulation, synthesis and testing of digital communications devices.
Generate documentation to support designs
Assist customer with writing requirements, reviewing designs and writing test procedures
Bachelors Degree in Electrical or Computer Engineering
Candidates will be required to have seven (7) to twenty (20) or more years of related engineering experience.
Six (6) or more year's experience working with FPGAs
Seven (7) year's experience with EDA tools.
TS/SCI with polygraph
Experience with Mentor Graphics EDA tools
Experience with Xilinx and/or MicroSemi FPGAs
Familiarization with timing analysis and code coverage analysis
Leidos is a Fortune 500® information technology, engineering, and science solutions and services leader working to solve the world's toughest challenges in the defense, intelligence, homeland security, civil, and health markets. The company's 32,000 employees support vital missions for government and commercial customers.
Headquartered in Reston, Virginia, Leidos reported annual revenues of approximately $10.19 billion for the fiscal year ended December 28, 2018. For more information, visit www.Leidos.com .
Pay and benefits are fundamental to any career decision. That's why we craft compensation packages that reflect the importance of the work we do for our customers.
Employment benefits include competitive compensation, Health and Wellness programs, Income Protection, Paid Leave and Retirement. More details are available here .
Leidos will never ask you to provide payment-related information at any part of the employment application process. And Leidos will communicate with you only through emails that are sent from a Leidos.com email address. If you receive an email purporting to be from Leidos that asks for payment-related information or any other personal information, please report the email to email@example.com .
All qualified applicants will receive consideration for employment without regard to sex, race, ethnicity, age, national origin, citizenship, religion, physical or mental disability, medical condition, genetic information, pregnancy, family structure, marital status, ancestry, domestic partner status, sexual orientation, gender identity or expression, veteran or military status, or any other basis prohibited by law. Leidos will also consider for employment qualified applicants with criminal histories consistent with relevant laws.
Serdes Layout Designer
Location: San Jose, CA
About the Team:
In support of the high-demand from our customers, the Physical Design Group is expanding and recruiting new members in the area of High-Speed SerDes Layout. The focus of this team is to implement complex, high speed analog and some high-speed custom digital circuits for High-Speed Serial IO interfaces for SoC and ASIC applications. We partner with the top-tier SoC companies to implement designs from RTL to tapeout, on today’s most complex process technologies, using the latest EDA tools and physical implementation methodologies.
About the Project:
As a member of the growing Next Generation Process Design and Layout team, the ideal candidate will have extensive experience with the layout of analog and high-speed custom analog/digital circuits for High Speed Serial IO Interface IPs to be used in SoC applications. Applicants must have several years of mask design experience using the design tools associated with these tasks, preferably Cadence tools, as well as familiarity with current FinFET CMOS technology generations (16nm and below). Potential candidate has capacity to learn new tools, methodologies, and technology. Applicants must be good team players. Knowledge and/or experience with Serial Link applications is a significant plus.
About Encore Semi
Encore Semi is a successful SoC Design and Software Engineering Services company headquartered in San Diego, California.
Mask Layout Designer - San Diego
Job Id N1968325 Job Title Mask Layout Designer
- San Diego Post Date 05/20/2019 Company Qualcomm Technologies, Inc.
Job Area Engineering Support
- San Diego
Job Overview QCT RF/Analog design group is seeking an experienced Mask Layout Designer to fulfill both block and project lead level roles working in a very large team environment. Responsibilities will vary depending on experience and expertise. The layout designer will be responsible for physical design of RF and analog circuits in a fast paced environment. Detail custom layout including floorplan, placement, routing, verification, and release of final database for high frequency RF circuits. Provide accurate schedule and plan to meet project milestone deadlines, debug complex verification errors, mentor junior layout designers, able to lead a team to deliver high quality layout that meets design requirements, understanding of hierarchical planning and integration, chip design from top down and bottom up through tapeout. All Qualcomm employees are expected to actively support diversity on their teams, and in the Company. Minimum Qualifications
- RF high frequency circuit custom layout at chip, block, and device levels
" id="hdnMinimumQualifications" />Associate Degree / Certificate with experience and/or education in the following:
- RF high frequency circuit custom layout at chip, block, and device levels
Preferred Qualifications Bachelor's degree with at least 5 years of experience in the following:
RF high frequency circuit custom layout at chip, block, and device levels
LNA, mixer, and VCO- Virtuoso XL - Caliber DRC/ERC/LVS verification and debugging tools Education Requirements Preferred: Bachelor's, Electrical Engineering
" id="hdnEducationalRequirements" />Required: Associate Degree / Certificate
Preferred: Bachelor's, Electrical Engineering
Keywords Mask layout, cadence, virtuoso, VXL, CMOS, RF
Mixed-Signal Integrated Circuit Designer
IBM is seeking a Mixed-signal integrated circuit designer to work at the Thomas J. Watson Research Center in Yorktown Heights, NY.
In this role, you will contribute to the development of innovative integrated circuits implemented in deep submicron CMOS (Complementary Metal-Oxide-Semiconductor) technologies. We focus on circuit designs that enable the creation of differentiated solutions for a range of mixed-signal and high-frequency challenges. Key areas of interest include PLL design, custom mixed-signal integrated circuit design, power-efficient high-speed I/O circuit and macro-level design and experience with industry-standard integrated circuit design tools. Further key areas include understanding of and experience with co-integration of analog and digital circuit elements as well as experience with industry standard design tools. Familiarity with and experience in mixed-signal design verification, circuit test, and hardware/firmware implementation of AI algorithms or signal processing algorithms are a plus. This job will also entail driving the development of new intellectual property and will require strong collaboration with other members of our design teams.
As a successful candidate, you will:
Have experience with relevant industry-standard development tools such as Cadence
Possess a track record of success in completing complex integrated circuit designs
Collaborate well with a multi-disciplinary team
Possess proven writing and presentation skills
Successfully create and communicate technical ideas
Responsibilities will include innovative circuit design, simulation, layout and/or layout oversight, power reduction/optimization, verification, and hardware evaluation.
- Minimum of a Masters Degree in Electrical Engineering or a related area is required.
Required Technical and Professional Expertise
Mixed-signal integrated circuit design in deep submicron technology: 2 years
Mixed analog-digital design and verification: 2 years
Experience with integrated circuit design tools (e.g. Cadence environment): 2 years
Preferred Tech and Prof Experience
Ph.D. Degeree in Electrical Engineering
Experience with the design of high-frequency, low-noise frequency synthesizers
Knowledge of programming languages such as C and Python for automated tests
Experience with VHDL/Verilog and logic synthesis
Familiarity with existing learning based algorithms (AI) and their hardware/software implementation
Familiarity with FPGA-based implementations of digital control and signal processing function
IBM is committed to creating a diverse environment and is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, gender, gender identity or expression, sexual orientation, national origin, genetics, disability, age, or veteran status. IBM is also committed to compliance with all fair employment practices regarding citizenship and immigration status.
Preferred Education: Doctorate Degree Commissionable: No
Key Job Details
Required Education:Master's Degree
Location:YORKTOWN HEIGHTS, NY US
Digital Application Specific Integrated Circuit Designer
Candidate will design, simulate, synthesize and test IP in support of a large ASIC design effort that will be spread over multiple sites across the country. Candidate tasks will include Verilog/VHDL RTL design, typically in a fast-paced and mission-driven environment.
The candidate will need to demonstrate innovation, quick learning, excellent communication skills and adaptive thinking to tackle the diversity of tasks the team works on. In design tasks, candidate will work with multiple fabrication facilities.
Candidate must be a US Citizen and possess at least a Secret Clearance. Position will require eligibility to obtain (and maintain) a Top Secret Clearance
Position requires at least 5 years of relevant work experience, preferably supporting R&D for DoD projects
Candidate must be proficient with Mentor Questa Sim, Synopsys Design Compiler, PrimeTime, ModelSim, MS Word, MS Visio, MS Excel and MS Power Point
Preferred candidate will have Experience with complete ASIC and FPGA design flows involving timing closure using scripting languages and design automation
Experience developing / supporting firmware development for custom CPUs, Field Programmable Gate Array development tools (Microsemi Libero, Xilinx Vivado/ISE), Trusted Fabrication development flow, Digital Rights Management, cryptographic algorithms and applications is preferred as well
CFD Research offers competitive salaries and excellent employee benefits, including an employer matching 401(k) and Employee Stock Ownership Plan (ESOP). CFD Research offers a highly competitive insurance package, including medical, vision, and dental insurance. We offer company paid long-term disability, accidental death and dismemberment, and life insurance.
Performance appraisals occur each year and pay increases are based upon corporate goals, personal development, performance, and outstanding achievements. In addition, group and individual bonuses are awarded for exceptional performance.
About the Company
CFD Research is the technology leader in engineering simulations and innovative designs. Our services are used by many Fortune 500 and emerging high-tech companies, national laboratories, and universities worldwide. We develop cutting-edge technologies (software & hardware, designs and prototypes) with Federal agencies and provides the highest possible leverage to our industry partners.
CFD Research is an Equal Opportunity Employer. Employment decisions are made without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status or other characteristics protected by law.
Layout Designer (For Test Prep Book)
MasteryPrep is an education services company that specializes in college entrance exam preparation. It is a fast-growing organization and one of the leading providers of ACT and SAT preparation serving hundreds of thousands of students in over 500 schools and school districts across the country.
The company is expanding its line of SAT products for the 2019-2020 school year and is looking for talented designers to lay out lessons for a semester-long SAT curriculum. If you are interested in doing layout work for an education company that primarily serves under-resourced schools and districts and/or you are seeking freelance work that pays well, consider joining MasteryPrep!
- Convert content from Word to InDesign using a design template for student lesson content and practice questions.
- Convert content from Word to InDesign using a design template for teacher instruction.
- Style PowerPoint slide decks by applying a template, making minor layout adjustments, and setting up transition animations.
- Implement revisions logged in a PDF file to InDesign documents.
- Communicate regularly with the lead layout designer in regard to deadlines, feedback, and transparency on work progress.
- Produce revisions on all work as necessary prior to the completion of an assignment.
- Excellent InDesign and PowerPoint skills.
- Intermediate knowledge of Adobe Acrobat.
- Able to follow deadlines and produce quality work with a prompt turnaround, typically within 1-2 weeks.
- Knowledge of graphic design and user experience.
- Eye for detail.
- Familiarity using and access to the following: a stable internet connection, Adobe InDesign and Acrobat (Creative Cloud subscription version), Microsoft Word, PowerPoint, Gmail, Dropbox, Slack messaging, and Zoom video conferencing.
- Test-prep and/or book layout experience are prioritized.
All contractors will be paid by assignment and only on completion. Most assignments will range between $200 and $350 for the completion of an entire lesson and dependent on the complexity of the assignment. Smaller assignments will pay less and will be determined at the time of the assignment.
Printed Circuit Board Designer (Temp)
Minimum of an associate degree in electronic engineering or CAD systems
Zero to two years experience in PCB or mechanical design
Bachelor's degree in engineering technology is preferred
Prior knowledge of AutoCAD and SolidWorks is a plus
A working knowledge of PCB CAD tools, PADS, and schematic capture tools is also desired
Security Clearance Requirements
Must be a U.S. citizen. Applicants selected will be subject to a background verification and drug screen.
SRC, Inc. is seeking a printed circuit board designer to perform layout and oversight of printed circuit boards (PCBs) for military electronic systems.
Work closely within a design team to generate PCB artwork from schematics
Use PCB CAD tools to perform placement and routing of digital, RF micro strip, and RF co-planar wave guide based circuits using the latest industry (IPC) standards
Work with mechanical design tools (AutoCAD and Solidworks) to define mechanical specifications of custom components and details of printed circuit board assemblies including heatsinks, mounting frames, etc.
Interface with PCB board manufacturers and assembly houses to fabricate prototype assemblies
Manager Electronics Engineering 2-Electrical Devices & Integrated Circuit Design
Northrop Grumman Mission Systems Sector is seeking a leader to manage its growing Integrated Circuit Design organization. This group is responsible for the design of Integrated Circuits across a wide variety of applications and technologies, including but not limited to Superconducting Electronics, RFICs, MMICS, Analog/Mixed Signal, Digital ASIC, and filters in Silicon CMOS, SiGe, GaAs, GaN, and Superconducting technologies in support of all Mission Systems Sector research, development, and production Programs. Group skill sets include requirements definition, schematic design, circuit simulation, EM modeling, manual layout, physical and electrical verification, design verification testing, and production support.
This position is a dual role encompassing both people and project/technical leadership.
Roles and responsibilities include, but are not limited to:
Lead an Integrated Circuit Design functional group of 10 to 15 engineers including performance management, career development, staffing, and merit planning
Provide project and technical oversight for design activities performed by the group
Maintain and ensure application of design processes and guidelines used in the group
Develop proposal inputs and review proposal content for both internal and external customers
Collaborate with peer managers to ensure consistency across multiple work groups
Support department initiatives, recruiting, technology roadmap creation, cross-campus/sector involvement, and internally funded projects
This position is located in Baltimore, MD. This position will report to the manager of the Electrical Devices & Integrated Circuit Design section within Electrical Design & Technology.
Bachelor's degree in Electrical Engineering or equivalent Engineering or Technical degree
Minimum 7 years of related engineering experience including responsibility as an integrated product team or technical lead
Excellent verbal and written communication skills
Basic understanding of Integrated Circuit design
Must be able to obtain and maintain a high level security clearance
Master's degree in Engineering, Business Management, Engineering Leadership, or equivalent
12 years of experience in a multi-disciplined engineering environment
Demonstrated success leading high performance teams as technical, integrated product team, and/or functional leader
RFIC and mixed signal IC design, PDK development, IC tools experience
Current Secret or Top Secret Clearance
Northrop Grumman is committed to hiring and retaining a diverse workforce. We are proud to be an Equal Opportunity/Affirmative Action Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. For our complete EEO/AA and Pay Transparency statement, please visit www.northropgrumman.com/EEO. U.S. Citizenship is required for most positions.
Layout Designer Associate
Oshkosh Corporation is a leading manufacturer and marketer of access equipment, specialty vehicles and truck bodies for the primary markets of defense, concrete placement, refuse hauling, access equipment and fire & emergency. Founded in 1917, Oshkosh Corporation has manufacturing operations in nine U.S. states and in Australia, Belgium, Brazil, Canada, China, France, Mexico, The Netherlands, and Romania. The company currently employs approximately 12,100 people worldwide.
Oshkosh Corporation is a Fortune 350, multi-billion dollar company. Oshkosh Corporation designs and builds the world's toughest specialty trucks, truck bodies, and access equipment by working shoulder-to-shoulder with the people who use them.
The Associate Systems Designer will support engineers with drawing layouts by utilizing computer-aided drafting software. This role will also be responsible for creating new and modified components and Bill of Materials (BOM) in accordance to the Oshkosh standards.
ESSENTIAL DUTIES AND RESPONSIBILITIES:
These duties are not meant to be all-inclusive and other duties may be assigned.
- Update current drawings per markups based on direction from engineering; re-master CAD drawings to current format.
- Use computer-aided drafting systems to create 3D and 2D layouts of parts and small assemblies.
- Self-check own work to ensure accuracy and organization, dimension and tolerance convention, and conformance with established CAD specifications and standards.
- Prepare and create Change Notice (CN) documents based on BOM and design layouts for appropriate date entry.
- Utilize ERP systems to create part numbers following the proper naming process and data entry requirements.
- Create and review BOM following engineering procedures.
- Provide technical assistance for prototype, pilot, and production support; provide assistance when needed.
- Associate degree or equivalent* with four (4) years of experience in drafting/design.
- Verbal and written communication skills.
- Ability to adapt to a fast pace environment.
- Detail oriented.
- Capable of using standard Windows Office tools including SharePoint, email, and CAD tools.
- Ability to read and interpret engineering drawings.
- Associate degree or equivalent* with five (5) years of experience in drafting/design.
Oshkosh Corporation is an Equal Opportunity and Affirmative Action Employer. This company will provide equal opportunity to all individuals without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or veteran status. Information collected regarding categories as provided by law will in no way affect the decision regarding an employment application.
Oshkosh Corporation will not discharge or in any manner discriminate against employees or applicants because they have inquired about, discussed, or disclosed their own pay or the pay of another employee or applicant. However, employees who have access to the compensation information of other employees or applicants as a part of their essential job functions cannot disclose the pay of other employees or applicants to individuals who do not otherwise have access to compensation information, unless the disclosure is (a) in response to a formal complaint or charge, (b) in furtherance of an investigation, proceeding, hearing, or action, including an investigation conducted by the employer, or (c) consistent with Oshkosh Corporation's legal duty to furnish information.
Certain positions with Oshkosh Corporation require access to controlled goods and technologies subject to the International Traffic in Arms Regulations or the Export Administration Regulations. Applicants for these positions may need to be "U.S. Persons," as defined in these regulations. Generally, a "U.S. Person" is a U.S. citizen, lawful permanent resident, or an individual who has been admitted as a refugee or granted asylum.
Sr. Staff Mask Layout Designer (73083)
What you do at AMD changes everything
At AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center.
Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the "extra mile" to achieve unthinkable results. It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world. If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.
Staff Mask Layout Designer
For more than 45 years, AMD has driven innovation in high-performance computing, graphics, and visualization technologies ― the building blocks for gaming, immersive platforms, and the data-center. Hundreds of millions of consumers, leading Fortune 500 businesses, and cutting-edge scientific research facilities around the world rely on AMD technology daily to improve how they live, work, and play.
AMD employees around the world are focused on building great products that push the boundaries of what is possible. For more information about how AMD is enabling today and inspiring tomorrow, visit the AMD (NASDAQ: AMD) website, blog, Facebook and Twitter pages.
AMD is seeking an innovative Staff Mask Layout Designer. This is a highly visible position for a valued member of the Mask Design Team in collaboration with the circuit team for optimal planning and construction of the design. This is an opportunity to work with great people on bleeding edge technology that impacts the entire portfolio of products.
Complete complex mask design analog, mix signal and digital while forecasting and maintaining a reliable schedule.
Be a valued member of the Mask design team in collaboration with the circuit team for optimal planning and construction of the design.
Successfully verify designs against a host of leading edge physical and electrical checks and guidelines.
Hands on lead mask designer on various complex macro's and tiles to be integrated at SOC level.
Good understanding of DRC/LVS debug, able to mentor design team in technology bring up.
Work closely with the team and contribute in all stages of the design flow.
Work to improve existing tools utilized by the mask design community.
- Bachelor's degree in Engineering and at least 5 years of related experience OR Associates Degree in Engineering and 10 years of related experience.
Requisition Number: 73083
Country: United States State:
Massachusetts City: Boxborough
Job Function: Design
AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers.
We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.
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